1. Field of the Invention
This invention relates to slurries utilized in polishing systems and more particularly to chemical mechanical polishing oxidizing slurries for utilization in semiconductor processing with low-dielectric constant materials.
2. Description of Related Art
Integrated circuits are fabricated upon a substantially flat, disc-shaped silicon wafer or substrate, hereinafter referred to as silicon wafers. The surface of a silicon wafer is subdivided into a plurality or array of rectangular areas onto which are formed photolithographic images, generally identical to one another. Through a series of well-known processing steps, each of the rectangular areas eventually becomes an individual die on the wafer.
Generally the integrated circuit die, especially in very large scale integrated semiconductor circuits, are manufactured by depositing and patterning a conductive layer or layers upon the semiconductor wafer and then a nonconductive layer formed from an insulator, covering the conductive layer. The insulator is typically a silicon dioxide (SiO.sub.2) dielectric. The layers are stacked upon one another creating a nonplanar topography, typically caused by the nonconductive or dielectric layers being formed over the raised conductive lines or other features in the underlying conductive layer.
As the integrated circuit devices have become more sophisticated and hence more complex, the number of layers stacked upon one another increases and as the number of layers increase, the planarity problems generally increase. Planarizing the layers during the processing of the integrated circuits thus can become a major problem and a major expense in producing the circuits. The planarity requirements have resulted in a number of approaches, and most recently, chemical mechanical polishing (CMP) techniques have been utilized to planarize the semiconductor wafers. Successful utilization of CMP would be highly desirable since the CMP techniques are less complex compared to the previously utilized methods. The CMP techniques typically utilize a polishing block or pad or plurality of the blocks or pads with a chemical slurry. The blocks are rubbed against the layer to be planarized with the addition of a chemical slurry which aids in obtaining the planarity of the semiconductor wafer for further processing.
The necessary parameters for polishing the SiO.sub.2 based intermetal dielectric layers have become well known in the semiconductor industry and the chemical and mechanical nature of polishing and wear of the SiO.sub.2 based dielectrics have been reasonably well developed. One problem with the SiO.sub.2 dielectrics, however, is that the dielectric constant is relatively high) being approximately 3.9, or higher, depending on factors including residual moisture content. As a result, the capacitance between the conductive layers is also relatively high, and this limits the speed (frequency) at which the circuit can operate. Strategies being developed to reduce capacitance include incorporating metals with lower resistivity values, such as copper, and providing electrical isolation with insulating materials having lower dielectric constants relative to SiO.sub.2. Thus, it would be highly desirable to incorporate a low dielectric constant material into semiconductor structures while still being able to utilize the conventional CMP systems for polishing the surface of the resulting dielectric material during the semiconductor wafer processing.
As described herein, "low dielectric constant materials" include "organic polymer materials, porous dielectric materials, whether organic or inorganic, and blended or composite organic and inorganic materials, whether porous or not."
Typically these are polymer dielectric materials which include unique chemical, mechanical and electrical characteristics, including dielectric constant values of less than three (3.0). These low dielectric constant materials can include relatively high organic content materials, both low and high organic content materials with a high level of porosity, relatively low organic content materials based upon silicon oxygen type materials and inorganic materials, or materials exhibiting a combination of these properties. The low dielectric constant films can be deposited utilizing a variety of techniques including chemical vapor deposition (CVD), and spin coating. The organic polymer materials generally are mechanically soft and they readily exhibit plastic deformation and hence they can easily be scratched. In contrast, however, to their mechanical sensitivity, organic polymers are often chemically inert. The combination of the characteristics of the polymer dielectric materials makes an aqueous based polymer CMP process difficult. Incorporating these low dielectric constant materials into viable submicron fabrication techniques will necessitate the development of robust CMP processes which Applicants have discovered are not currently available utilizing the SiO.sub.2 -based CMP processes.
Conventional polishing abrasives, such as SiO.sub.2 and Al.sub.2 O.sub.3, utilized for CMP and related polishing applications in the optical and disk industries are typically produced by chemical precipitation methods or by flame hydrolysis. In chemical precipitation, individual oxysalt particles are typically precipitated from aqueous solutions. The relatively coarse oxysalt particles are filtered, dried, and subsequently subjected to a thermal process called calcination which forms the final, finely divided oxide powder. Low calcination temperatures produce high surface area oxide powders that consist of very small particles. Increasing the calcination temperature typically reduces the total surface area of the powder per unit volume with a corresponding increase in particle size.
In flame hydrolysis, chlorinated or silane precursor materials are subjected to a high temperature, oxyhydrogen flame. Upon entering the flame the precursor reacts with the hydrogen and oxygen, and is transformed to the final oxide product. The particle size, particle size distribution, and surface area of the resulting oxide powder can be controlled by varying the process temperature, the residence time in the reaction chamber, and the relative concentration of the chemical precursors. Oxide powders thus formed consist of very small, primary particles that are strongly adhered to other primary particles in a 3-dimensional network referred to as an aggregate. These aggregates are mechanically robust and are considered irreducible, i.e., they cannot be broken down to the dimensional scale of the primary particles under normal use conditions. The aggregates themselves are often entangled with other aggregates forming agglomerates.
Conventional polishing slurries are derived by incorporating the agglomerated oxide powder into an aqueous suspension with mechanical agitation. Limited suspension stability is obtained by incorporating dispersing agents, or adjusting the suspension pH such that a sufficiently high zeta potential is realized to impart stability through coulombic interactions. Subsequent particle size reduction processes improve suspension stability and polishing performance by breaking down large particle agglomerates.
The metal oxides used as abrasives can be classified into two categories: chemically active oxides and chemically inactive oxides. Chemically active oxides are those oxides which contain metals which can be readily reduced under normal conditions of use. Examples of metals which form active types of oxides are cerium (Ce), iron (Fe), tin (Sn), and zirconium (Zr). Chemically inactive oxides are those oxides which contain a metal that is not readily reduced under normal use conditions, and therefore, can be considered nonreactive. Examples of these oxides are aluminum oxide (Al.sub.2 O.sub.3), and silicon dioxide (SiO.sub.2).
CMP slurries tailored for SiO.sub.2 dielectrics, typically incorporate SiO.sub.2 abrasives in a high pH aqueous slurry. Current thinking holds that the water hydrolyzes the silicon dioxide material at the silicon dioxide/slurry interface, softening it, thus allowing the silicon dioxide particles in the slurry to abrade the surface of the dielectric. The high pH environment serves two functions: one, to impart stability to the silicon dioxide abrasive slurry and two, to increase the solubility of the hydrolyzed silicon dioxide groups in the aqueous solution. Applicants have discovered, however, that as the organic content of the film increases, the efficiency of conventional silicon dioxide based slurries diminishes rapidly. For example, such an oxide slurry utilized on a typical CMP device, using typical process settings, provides a removal rate of about two thousand five hundred (2500) Angstroms per minute from the surface of the SiO.sub.2 dielectric film. However, these same CMP conditions may only provide a removal rate of about two hundred (200) Angstroms per minute on a purely organic polymer film. The conversion from mechanical energy to material removal is thus much lower and unacceptable for use in semiconductor processing.
One CMP solution for low-dielectric constant materials is disclosed in U.S. patent application Ser. No. 09/096722, entitled "Aqueous Metal Oxide Sols As Polishing Slurries For Low Dielectric Constant Materials", filed Jun. 11, 1998, assigned to the same assignee, including one of the present Applicants, which is incorporated herein by reference.